In partial fulfillment of graduation requirements, each student is required to complete 40 working days of training  during the summer vacations, normally at the end of the junior year, in accordance with rules and regulations set by the Department. Summer training involves full-time work experience in industry in the area of student career interest. A formal report and evaluation by work supervisor required.  Prerequisite:  Junior standing and consent of department

The fundamental concepts of modern digital VLSI circuit design using CMOS technology with an emphasis on “hands-on” IC design using CAD tools. An overview of CMOS technology. Combinational and sequential logic circuits including transistor level design of logic gates at the device and layout level. Clocking methods. Memory design and memory decode logic. Digital IC design flow. Hardware Description Languages (VHDL/Verilog), architectural aspects of a VHDL, synthesised VHDL on physical hardware. Low-power logic families such as DCVS and Adiabatic Logic and discuss the implications of modern methods on circuit design. Chip level design methodologies (full-custom, semi-custom and standard cell) exploration.