Assoc. Prof. Dr. Mustafa K. Uyguroğlu
Wednesday : 10:00 - 10:30
Assist. Prof. Dr. Hassan Abou Rajab
Wednesday : 10:00 - 10:30
Mahmoud K. A. Nazzal
Tel: 0392-630 2779
EENG115/INFE115 Introduction to Logic Design
EENG211/INFE211 Digital Logic Design I
This is core course of Electrical and Elecronic Engineering and Information System Engineering that presents basic tools for the design of digital circuits. It serves as a building block in many disciplines that utilize data of digital nature like digital control, data communication, digital computers etc. The goal of this course is to;
1. perform arithmetic operations in many number systems.
2. manipulate Boolean algebraic structures.
3. simplify the Boolean expressions using Karnaugh Map.
4. implement the Boolean Functions using NAND and NOR gates.
5. analyze and design various combinational logic circuits.
6. understand the basic functions of flip-flops.
7. understand the importance of state diagram representation of sequential circuits.
8. analyze and design clocked sequential circuits.
This course makes significant contributions to the following program outcomes:
1. an ability to apply knowledge of mathematics, science, and engineering,
2. an ability to design and conduct experiments, as well as to analyze and interpret data,
3. an ability to design a system, component , or process to meet desired needs within realistic constraints
4. an ability to identify, formulate, and solve engineering problems,
5. an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.
- This topic
Digital Systems and Binary Numbers
Digital Systems, Binary Numbers, Number-base Conversions, Octal and Hexadecimal Numbers, Complements, Signed Binary Numbers, Binary Codes, Binary Storage and Registers, Binary Logic
Boolean Algebra and Logic Gates
Introduction, Basic Definitions, Axiomatic Definition of Boolean Algebra, Basic Theorems and Properties of Boolean Algebra, Boolean Functions, Canonical and Standard Forms, Other Logic Operations, Digital Logic Gates, Integrated Circuits
Gate level Minimization
The Map Method, Two-variable map, Three-variable map, Four-Variable Map,Five-variable Map, Product of Sums Simplification,Don’t-care Conditions, NAND and NOR Implementation, Other Two-Level Implementations, Exclusive-OR Function
Introduction, Combination Circuits, Analysis Procedure, Design Procedure, Binary Adder-Subtractor, Decimal Adder, Binary Multiplier, Magnitude Comparator, Decoders, Encoders, Multiplexers
Synchronous Sequential Logic
Introduction, Sequential Circuits, Storage Element: Latches, Storage Element: Flip-Flops, Analysis of Clocked Sequential Circuits, State Reduction and Assignment, Design Procedure
Past Exam Questions and Solutions