Topic outline

  • Topic 1

    Course Instructor


    Prof. Dr. Mustafa K. Uyguroğlu

    Tel: 0392-6301433


    EE 135

    office hours

    Monday :10:00-10:30

    Wednesday : 10:00 - 10:30

    C o u r s e   I n s t r u c t o r

     D r .   G ü r t a ç   Y e m i ş ç i o ğ l u

    Tel: (+90) (392) 630 15 83

    CT 123 C

    Tuesday     : 16:30 - 17:00

    Wednesday : 14:30 - 15:00


    Saeed Muhammadzadeh: Office NO:241
    Iman Beheshti:  Office No:240

  • Topic 2

    EENG115/INFE115 Introduction to Logic Design

    This is core course of Electrical and Elecronic Engineering and Information System Engineering that presents basic tools for the design of digital circuits. It serves as a building block in many disciplines that utilize data of digital nature like digital control, data communication, digital computers etc. The goal of this course is to;

    1. perform arithmetic operations in many number systems.

    2. manipulate Boolean algebraic structures.

    3. simplify the Boolean expressions using Karnaugh Map.

    4. implement the Boolean Functions using NAND and NOR gates.

    5. analyze and design various combinational logic circuits.

    6. understand the basic functions of flip-flops.

    7. understand the importance of state diagram representation of sequential circuits.

    8. analyze and design clocked sequential circuits.

    This course makes significant contributions to the following program outcomes:

    1. an ability to apply knowledge of mathematics, science, and engineering,

    2. an ability to design and conduct experiments, as well as to analyze and interpret data,

    3. an ability to design a system, component , or process to meet desired needs within realistic constraints

    4. an ability to identify, formulate, and solve engineering problems,

    5. an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.


    The homework assignments:

    ·       The first page must be the title pageThe title page must contain the namesurname and thnumber of the student. It should also contain the due date.

    ·       Please also include a table of points for each problem.

    ·       The solution must contaiall the necessary steps.

    ·       Remember that you must turn in the homework on the assigned days. Late submissions will not be accepted and graded.   

    Here is a sample title page. (You may download the .doc file and change the necessary information)



    Important Note: You may discuss the homework problems with your friends for exchanging general ideas, but you may not copy from one another. You may also not give any parts of your homework to other students to look at. Any students violating these rules or committing any other acts of academic dishonesty WILL be turned over to the disciplinary committee for disciplinary action.

  • This topic

    Topic 4

    Digital Systems and Binary Numbers

    Digital Systems,  Binary Numbers, Number-base Conversions,  Octal and Hexadecimal Numbers, Complements, Signed Binary Numbers, Binary Codes, Binary Storage and Registers, Binary Logic

  • Topic 5

    Boolean Algebra and Logic Gates

    Introduction, Basic Definitions, Axiomatic Definition of Boolean Algebra, Basic Theorems and Properties of Boolean Algebra, Boolean Functions, Canonical and Standard Forms, Other Logic Operations, Digital Logic Gates, Integrated Circuits

  • Topic 6

    Gate level Minimization

    The Map Method, Two-variable map, Three-variable map, Four-Variable Map,Five-variable Map, Product of Sums Simplification,Don’t-care Conditions, NAND and NOR Implementation, Other Two-Level Implementations, Exclusive-OR Function

  • Topic 7

    Combinational Logic

    Introduction, Combination Circuits, Analysis Procedure, Design Procedure, Binary Adder-Subtractor, Decimal Adder, Binary Multiplier, Magnitude Comparator, Decoders, Encoders, Multiplexers

  • Topic 8

     Synchronous Sequential Logic

    Introduction, Sequential Circuits, Storage Element: Latches, Storage Element: Flip-Flops, Analysis of Clocked Sequential Circuits, State Reduction and Assignment, Design Procedure

  • Topic 9


    Past Exam Questions and Solutions

  • Topic 10