Topic outline

  • General

    Lab Instructor

    Mahmoud Nazzal Personal Photo

     

    Mahmoud K. A. Nazzal

     

     

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    mahmoud.nazzal@cc.emu.edu.tr

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    Tel: 0392-630 2765

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    EE 111

  • Topic 1

    Lab Outline

    Experiment 1: TTL Logic Gates

    Demonstrating the operation and characteristics of a TTL logic gate (NAND gate-7400) and implementing the three basic logic functions using NAND gate.

    Experiment 2: CMOS Logic Gates

    Demonstrating the operation and characteristics of a CMOS logic gate (NOR gate-4001) and implementing the three basic logic functions using NOR gate

    Experiment 3: Applying NAND, NOR and XOR Gates

    TTL and CMOS, NAND, NOR, and XOR gates are used to implement any logic functions and implementing the Boolean algebra to reducing logic circuits to their minimum configuration.

    Experiment 4: Digital Adders-Subtractors

    Implementing and investigating the operation of a 2-bit full adder, 4-bit full adder, and 4-bit full subtractors from basic combinational 74LS logic.

    Experiment 5: Decoders/Demultiplexers and Multiplexers

    Testing the operation of 74x138 decoder, and using it as demultiplexer. Implement the Boolean functions using 74x138 decode and 74151 multiplexer.

    Experiment 6: D-type & JK-type flip-flops

    Demonstrating the operations and characteristics of D-type flip-flop and JK-type flip-flop. Verify that the flip-flop is a bistable multivibrator (has two stable state).And it has two complementary output states.

    Experiment 7: Binary Counters

    Demonstrating the operations and characteristics of a binary counter (up counter /down counter).

    • Topic 2

      Laboratory Experiments

      Exper_1

      TTL Logic Gates

      Exper_2

      CMOS Logic Gates

      Exper_3

      Applying NAND, NOR and XOR Gates

      Exper_4

      Digital Adders-Subtractors

      Exper_5

      Decoders/Demultiplexers and Multiplexers

      Exper_6

      D-type & JK-type flip-flops

      Exper_7

      Binary Counters

      • Topic 3

        Grading Policy

        Grading Policy:

        Performance: %15

        Reports: %50

        Final: %35

        Total: %100

        Attendance:

        Attendance is compulsory in order to pass the lab. If you miss at least %40 of the lab hours, you will definitely fail from the lab.

        Final Exam:

        There will be two final exams (Written and practical) at the end semester. There will be no make-ups for the final exam.

        Makeup :

        There will be no make up for the final exam. but you have the right for only one make up for the experiments.

        • Topic 4

          • Topic 5

            • Topic 6

              • Topic 7

                • Topic 8

                  • Topic 9

                    • Topic 10