Topic outline
- General
- Topic 1
Topic 1
Course Learning Outcomes:
Students must be able to
(1) Use latches, flip-flops, and differentiate between synchronous and asynchronous circuit operation.
(2) Perform analysis of synchronous sequential circuits.
(3) Apply fundamental design procedure for synchronous sequential circuits; consisting of the steps as construction of initial state transition table/diagram, perform state reduction and state assignment, develop flip-flop excitations, and design of registers and counters.
(4) Make VHDL implementations on the structured design of synchronous sequential circuits.
(5) Design shift registers and use register for data operations.
(6) Perform the design of synchronous and asynchronous counters using intuitive approaches.
(7) Carry out VHDL implementations of registers and counters.
(8) Apply algorithmic state machines (ASMs) approach for large-size digital system design; consisting of the steps as development of ASM charts and ASM blocks, make state assignment on ASMs, and perform datapath and controlpath designs.
(9) Make VHDL implementation of ASMs.
Relationship of Course to Program Outcomes
The course has been designed to contribute to the following program outcomes:
a) apply knowledge of mathematics, science, and engineering
e) identify, formulate, and solve engineering problems
k) use the techniques, skills, and modern engineering tools necessary for engineering practice
l) knowledge of mathematics through discrete mathematics and logic, basic sciences, and computer science
- Topic 2
- Topic 3
- Topic 4
- Topic 5
- Topic 6
- Topic 7
- Topic 8
- Topic 9
- Topic 10
