(G1 & G3) Rudwan Tarabishy Office NO. EE 115
(G2 & G4) Ahmad Rasheed Office NO. EE 115
Demonstrating the operation and characteristics of TTL and CMOS logic gates.
Demonstrating the implementation of logic functions using basic digital gates.
Demonstrating the operation of a 2-bit full adder, 4-bit full adder, and 4-bit full subtractors from basic combinational 74LS logic.
Demonstrating the operation of 74x138 decoder, and using it as demultiplexer.
Implementing Boolean functions using 74x138 decoder and 74151 multiplexer.
Demonstrating the operation and characteristics of flip-flops.