Introduction to Logic Design Lab

Topic outline

• Logic Design Lab (Spring 2020)
  
  

  Logic Design Lab (Spring 2020)

  
  Lab Instructors

  
  (G1 & G3)   Rudwan Tarabishy       Office NO. EE 115

  Email: eng.r.tarabishy@gmail.com

  
  (G2 & G4)   Ahmad Rasheed          Office NO. EE 115

  Email: ahmad.rasheed@emu.edu.tr

  
  
  

  • Announcements Archive Forum
• Experiment 1: Basic Logic Gates
  
  

  Experiment 1: Basic Logic Gates

  Demonstrating the operation and characteristics of TTL and CMOS logic gates.

  • Experiment 1 file 436.7KB PDF document Uploaded 12/03/20, 11:30
• Experiment 2: Logic Functions Realization
  
  

  Experiment 2: Logic Functions Realization

  Demonstrating the implementation of logic functions using basic digital gates.

  • Experiment 2 file 273.5KB Word document Uploaded 12/03/20, 11:32
• Experiment 3: Digital Adders-Subtractors
  
  

  Experiment 3: Digital Adders-Subtractors

  Demonstrating the operation of a 2-bit full adder, 4-bit full adder, and 4-bit full subtractors from basic combinational 74LS logic.

  • Experiment 3 file 307KB Word document Uploaded 12/03/20, 11:40
• Experiment 4: Decoders and Multiplexers
  
  

  Experiment 4: Decoders and Multiplexers

  Demonstrating the operation of 74x138 decoder, and using it as demultiplexer.

  Implementing Boolean functions using 74x138 decoder and 74151 multiplexer.

  • Experiment 4 file 866KB Word document Uploaded 12/03/20, 11:41
• Experiment 5: Flip-Flops
  
  

  Experiment 5: Flip-Flops

  Demonstrating the operation and characteristics of flip-flops.

  • Experiment 5 file 358KB Word document Uploaded 12/03/20, 11:41
• HW: Binary Counters
  
  

  HW: Binary Counters

  • HW File 6.5MB Word document Modified 24/05/20, 20:13